Dr. Linsen Li
I am a full-stack hardware system engineer with a solid background from hardware architecture & design to system integration & validation, driving product execution delivery with differentiated innovation. Proven track record from SOTA research (QSoC in Nature journal) to mass-production product (PROLED XDR Display), including $50M+ saving with innovation.
I completed my B.S. in EE at Tsinghua University in 2019, followed by an M.S. in 2021 and a Ph.D. in 2024 at MIT EECS. I began my career as a Display System Engineer at Apple Inc. in June 2024. I have authored over 30 scientific papers, appearing in top-tier publications such as Nature, Physical Review Letters, Optica, ACS Nano, and Nano Letters. I have a solid physics and math background with a gold medal in the Asian Physics Olympiad and a first-place award in the American Mathematical Modeling Contest. I have experience from SOTA research published in the Nature Journal and shipped SOTA hardware products delivered to millions of users.
EE-CS-AI Co-design Vision
Our world is based on the physical system, where EE plays an essential role in computation, sensing, control, and communication. However, the physical system has limited development speed due to physical law limitations for material/manufacturing.
Beyond the physical system, the digital system is essential by providing large programmable flexibility to reveal the power of the same physical system by reconfiguration. Various software can run on the same general hardware platform without marginal cost for duplicating.
The digitized information generated during digital services forms the data that becomes the foundation for AI. Learning from the mass volume of digitized data, AI reduces the barriers and starts to become the infrastructure and toolset for different fields. The fast development speed also benefits from the open-source environment for the AI community.
In this AI Era, the future engineering system solution having the competitive business need will be based on EE-CS-AI co-design, which integrates the strength of EE as a physical world sensor and executor, CS in digitization and programmability, and AI for trained complicated interference. The future engineering product will push toward physical-limited capability with an easy-to-use interface to provide the optimum cost performance.
Highlighted Product
Background: We introduced the PROLED XDR display, the world's best laptop display with true-to-life color (Wide color gamut P3 + Adobe RGB), and unparalleled brightness (HDR and SDR 2000nits peak) and contrast (10 million to 1).
EE: We integrated the intelligent display engine that precisely controls the color and luminance of every pixel at the sub-millisecond level, compensating for content, pixel use, temperature, and environment all at once. The result is exceptional brightness uniformity and shadow detail, even in fast-motion content. It also monitors each pixel’s usage to preserve stunning image quality over time.
CS: We developed the black level and color system tuning policy for all light conditions color management for the PROLED XDR display. This ensured the user experience of the 10 million-to-1 contrast ratio and P3 and AdobeRGB wide color gamut user experience in all light conditions. We also enabled comprehensive metrology for high-throughput testing in the factory for rigorous quality control.
AI: We developed an ML-assisted Self-Predictive Engine for per-pixel display compensation (De-Mura) by replacing physical camera captures with model predictions in the production line. Accelerated heavy math pipelines via GPU/CUDA and deployed securely encrypted calibration software directly to vendor factories. We also built a Generative AI agent backend with enterprise Claude code for automated data ingestion and correlation pipelines via internal APIs to enable automated data summary, visualization, failure analysis and natural language querying across high-dimensional, multi-station manufacturing datasets. This tool helped manage the product development data across the build. .
Highlighted Research
Background: General quantum information processing holds the promise for quickly solving extremely complex problems that might take the world’s most powerful supercomputer decades to crack. However, achieving that performance involves building a quantum system with millions of physical qubits. Delivering a system with such many qubits and controls in a hardware architecture is an enormous challenge. I introduced an EE-CS-AI codesign architecture solution for this research topic in my Ph.D. thesis at MIT EECS.
EE: We introduced a "Quantum System-on-Chip" (QSoC) hardware architecture that integrates thousands of individually addressable spin qubits in two-dimensional quantum microchiplet arrays into an integrated circuit, supporting full connectivity for quantum memory arrays by optical routing. We designed and built the EE hardware platform and setup combining the foundry tapeout, cleanroom fabrication, and in-house manufacturing.
CS: We proposed a protocol of “entanglement multiplexing” for large-scale quantum computing resource state generation fully utilizing the capability of the QSoC. We also built a digital twin model that connects the physical and the digital worlds for root cause identification and implementation optimization. The achievement of EE and CS parts of this work is published in the Nature journal.
AI: We proposed a "Transformer-on-QuPairs" architecture that uses machine learning technology to outperform the rule-based approach for the “entanglement multiplexing” quantum resource scheduling operation for the inhomogeneous quantum resource in paper.